Flash EPROMs (erasable programmable read only memories) are a growing class of non-volatile storage integrated circuits. These flash EPROMs have integrated memory cells which can be electrically erasable, programmable or readable. The entire array can be simultaneously erased electrically. The flash EPROM can also be randomly read or written.
The cells themselves use only a single device per cell and are formed using so-called floating gate transistors in which the data is stored in a cell by charging or discharging the floating gate. The floating gate is a conductive material, typically made of polysilicon, which is insulated from the channel of the transistor by a thin layer of oxide or other insulating material, and insulated from the control gate word line of the transistor by a second layer of insulating material.
The act of charging the floating gate is termed the "program" step for a flash EPROM. This is accomplished through a so-called hot-electron injection by establishing a large positive voltage between the gate and source, as much as 12 volts, and a positive voltage between the drain and source, for instance, 6 volts. A drain pump supplies the current needed to program the memory cells.
The act of discharging the floating gate is called the "erase" function for a flash EPROM. This erasure function is typically carried out by a Fowler-Nordheim tunneling mechanism between the floating gate and the source of the transistor (source erase) or between the floating gate and the substrate (channel erase). For instance, a source erase operation is induced by establishing a large positive voltage from the source to gate, while floating the drain of the respective memory cell. This positive voltage may be as much as 12 volts.
A problem encountered with the conventional way in which flash EPROM cells are programmed is the large amount of current required for programming a high density flash EPROM memory device. A typical flash EPROM memory device has 1 million bits (megabits or Mbit) of memory cells organized as 128 thousand (K) bytes of 8 bits each. Typically, all 8 bits are programmed at the same time. When the voltage supplied to the integrated circuit is at 12 volts, it will be high enough to provide the current needed to program the memory cells. As the personal computer industry is progressing towards size reduction and mobile computing, notebook and subnotebook computer applications become very popular. In these applications, power consumption is a concern since batteries are typically used to supply electrical power to notebook and subnotebook computers. It is known that an integrated circuit which uses a lower supply voltage consumes less power. Therefore, most of the integrated circuits used for these applications are designed to work with a lower supply voltage. Accordingly, there is a growing demand for memory devices that have supply voltage lower than the 12 volts previously used. Nowadays, the supply voltage is being reduced to 5 volts and is expected to be further reduced to 3.3 volts in the near future. When the supply voltage is at 5 volts or below, a drain pump is required to pump up the supply voltage so that there is sufficient current to program up to 8 bits of memory cells simultaneously. Further, as the microprocessor technology advances, higher density flash EPROM memory devices are required. The industry's demand is towards requiring flash EPROMs having storage capacity of 4 Mbit and 16 Mbit, organized as 256K words of 16 bits each and 1 million words of 16 bits each respectively. In these flash EPROMs, 16 bits of memory cells may have to be programmed at one time thus doubling the current requirement as compared to the programming of only 8 bits of memory cells simultaneously in previous devices. There has been an attempt to solve the problem of delivering more current to 4 Mbit or 16 Mbit devices by doubling the number of drain pumps or increasing the size of the existing drain pumps so as to increase their current capacities.
While using more drain pumps or increasing the current capacity of drain pump will be able to supply adequate current to 4 Mbit or 16 Mbit memory devices, it undesirably adds complexity to the design of the integrated circuits. Besides, increasing the number of drain pumps or increasing the size of the drain pump increases the overall size of the integrated circuit where the flash EPROM resided. Further, as the demand for higher density flash EPROM memory device grows, there is an expectation that the number of bits to be programmed will continue to increase and a better way of providing the current needed for such high density devices is necessary. Hence, there is a need to have a method and an apparatus for programming high density flash EPROM memory devices with low supply voltage without undesirably increasing the complexity of the design and the size of the integrated circuit. The present invention addresses such a need.